Three-dimensional vertical NAND strings having one bit per cell are disclosed in an article by T. Endoh et al., titled “Novel Ultra High Density Memory With A Stacked-Surrounding Gate Transistor (S-SGT) Structured Cell”, IEDM Proc. (2001) 33-36.
Charge leakage across different levels of control gate electrodes in a charge storage material layer can degrade data retention and data accuracy in a three-dimensional memory device. Methods for improving charge retention and data accuracy in a three-dimensional memory device are thus desired.